1. Field of the Invention
This invention relates to microprocessors. In particular, the invention relates to chipsets.
2. Description of Related Art
Advances in microprocessor technology has led to development of many high-performance chipsets with highly integrated architectures. Host bridge chipsets to interface to buses such as peripheral component interconnect (PCI) provide many advanced functionalities to support various platform configurations, including multi-master systems.
However, there are many applications that need efficient techniques to handle different types of transactions. These applications include phase-sensitive real time applications (e.g., variable bit rate multimedia or fixed rate audio), fiber channel disk controllers, or high performance network interface devices (e.g., Gigabit Ethernet). One difficulty with PCI is determining what packets require expedited service. High-performance disk reads and network frame transfers usually require lots of bandwidth. Devices supporting these functions usually have a mixture of memory access commands including short reads and burst transfer sequences. Existing chipsets do not provide support for this kind of transactional behavior.
Therefore, there is a need to have an efficient technique to handle transaction requests having different characteristics.